1. Field of the Invention
The invention relates to a differential amplifier, and more particularly to a differential amplifier and a comparator using the same.
2. Description of the Related Art
When digital data are transmitted to a display device, one method of transition minimization is achieved by implementing an advanced encoding algorithm that converts 8 bits of data into a 10-bit transition minimized, DC balanced character. The signal is optimized to reduce electromagnetic interference (EMI), which allows faster signal transfer rates with increased accuracy. This differential amplifier circuit allows complimentary limited amplitude signals to be transmitted over twisted pair wires instead of more expensive coaxial cable. For example, TMDS link architecture consists of a TMDS transmitter that encodes and serially transmits a data stream over the TMDS link to a TMDS receiver. For example, a single TMDS link has a bandwidth of 165 MHz, which can be applied to a display with 1600×1200 (UXGA) specification at 60 Hz. Consequently, differential amplifiers or voltage comparators used in TMDS receivers must have large gain in order to decode and recover the transmitted signal.
FIG. 1 to FIG. 5 show several conventional amplifiers and voltage comparators. Those conventional amplifiers or voltage comparators, however, do not have large amplification ratio in high frequency for AC amplitude in order to decode and recover the transmitted signal for a TMDS-type receivers. Thus, receivers using these conventional amplifiers or voltage comparators of the prior art may output erroneous data to succeeding devices due to the lack of AC amplitude gain to recover and decode the transmitted signal.